Lab 6

Model of elevator controller in SystemC

The purpose of this lab is to get acquainted with SystemC description language. During this lab you are going to compile and simulate a project with a help of ModelSim simulator and with a help of C++ compiler (plus systemC library).

In order to run SystemC in ModelSim you need to make some changes in the original SystemC code (see also last pages of systemC lecture slides).

• To compile systemC files you need to type in the command line: sccom filename or Compile -> Compile Selected (you can’t compile .h files)
• Then you need to link the design: Compile-> SystemC Link or from command line sccom -link
• Afterwards simulate and run as you’ve done using VHDL and Verilog. Don’t forget to change default time units of Resolution in Start Simulation Window;

In order to practice how to compile and simulate SystemC files in ModelSim design of multiplexer code mux.h and mux.cpp written in SystemC is given for you, also the testbench for the multiplexer is proposed t_muxMS.cpp.

In order to work with other C++ compilers (plus systemC library) you need to make the followings:

• To compile systemC files you need to type in terminal window: g++ -o [output name] [file name] –I/cad/sysC/include –L/cad/sysC/lib –lsystemc
• To run your program type: ./[output name]
• It is possible to save signals changes during simulation into trace file, which is in the given example (mux design) named “trace-it”. Opening trace-it.vcd file you can watch your results in a text form. Or you can observe them in GTKWave Electronic Waveform Viewer: gtkwave [trace file name]

In order to practice how to compile and simulate SystemC files with g++ compiler (plus systemC library) design of multiplexer code mux.h and mux.cpp written in SystemC is given for you, also the testbench for the multiplexer is proposed t_mux.cpp.

During this lab you are going to rewrite your elevator controller designed in lab 4 from Verilog language to SystemC language.

For this task you get an “empty module” of the model of elevator controller (the specification is the same as in lab 4) – design interface elevator.h and elevator.cpp, which you need to fill with behavioral design of elevator controller. To test your design correctness, ready-made simple testbench t_elevator.cpp is given.

Task:

· Learn to use ModelSim for SystemC files, compile and simulate given multiplexer design.

· Learn to use g++ compiler in combination with systemC library for SystemC files, compile and simulate given multiplexer design.

· Rewrite the behavioral model of elevator from Verilog to SystemC (supposed the lab 4 is ready). Simulate your design in order to get right behavior of the elevator.

· Simulate your elevator design as with ModelSim (testbench for elevator is written for ModelSim format) as with g++ compiler – in this case you are required to rewrite testbench of elevator to standard systemC format (see example in t_mux.cpp).

Requirements:

• Code with comments added to the report;
• Waveform picture added to the report;
• Description of the solution;

If you want you can install SystemC to your home PC. Here you can find discription for SystemC installation to any OS.