Raimund Ubar,
Tallinna Tehnikaülikool,
Ehitajate tee 5, Tallinn EE0026, Estonia
E-mail: raiub@pld.ttu.ee
1. Design of Automatic Test Equipments. (A. Seleznev, B. Dobriza, R. Ubar), Mashinostrojenie, Moscow, USSR, 1983, 224 p. (in Russian).
2. Fehler in Automaten. (by D. Bochmann and R. Ubar), VEB Verlag Technik, Berlin, 1989, 216 p.
3. Digitaalarvutite operatsioonseadmed (R. Ubar). Tallinna Polütehniline Instituut, 1978, 103 p.
4. Diagnosis of Digital Devices. I. (R. Ubar). Tallinn Techn. University, 1980, 114 p. (in Russian).
5. Diagnosis of Digital Devices. II. (R. Ubar), Tallinn Techn. University, 1981, 112 p. (in Russian).
6. Operatsioonautomaadid digitaalarvutites (R. Ubar). Tallinna Polütehniline Instituut, 1987, 96 p.
7. Design of Digital Systems for Testability. (R. Ubar), Tallinn Technical University, 1988, 68 p. (in Russian).
8. Equipment for Testing LSI. (T. Lohuaru and R.Ubar), A.C. No.1218390, Inf. Bulletin No.10, 1986.
9. Equipment for Testing Synchronized digital circuits. (T.Evartson, R.Ubar, A.Viilup), A.C. No.3772884/24, Inf. Bulletin No.25, 1986.
10. Equipment for Fault Localization in Digital Objects. (T.Evartson, H.Haak, T.Lohuaru, R.Ubar), A.C. No.3984709/24, Inf. Bulletin No.19, 1987.
11. Equipment for testing VLSI. (T.Lohuaru, M.Mannisalu, P.Pukk, R.Ubar, E.Vanamolder). A.C. No. SU 1652976 A1, Inf. Bulletin No.20, 1991.
[1971|1973|1976|1977|1978|1979|1980|1981|1982|1983|1984|1985|1986|1987|1988]
[1989|1990|1991|1992|1993|1994|1995|1996|1997]
12. About Selection of Test Points. (R. Ubar), Automatics and Computer Engineering, No.3, 1971, Riga, (in Russian).
13. Using Monte-Carlo Method for Optimization of Test Processes. (V. Maslennikow, R. Ubar), Proceedings of Bauman Technical University, No.148, 1971, Moscow, (in Russian).
14. Minimization of Average Time of Fault Detection Processes in Technical Devices. (V. Maslennikow, R. Ubar), Proceedings of Bauman Technical University of Moscow, No.148, 1971, Moscow, (in Russian).
15. Diagnosis of Multiple Faults in Combinational Circuits. (U. Heiter, R. Ubar, A. Viilup), Proceedings of Tallinn Techn. University, No.350, 1973, Tallinn, (in Russian).
16. Synthesis of Test Procedures for Complex Technical Objects, (B. Dobritza, R. Ubar), Journal of Bauman Technical University of Moscow, No.162, 1973, Moscow, (in Russian).
17. Equivalent Transformations of Diagnostic Dictionaries. (R. Ubar), Journal of Bauman Technical University of Moscow, No.210, 1976, Moscow, (in Russian).
18. Test Generation for Digital Circuits with Alternative Graphs. (R. Ubar), Proceedings of Tallinn Technical University, No.409, 1976, Tallinn, pp.75-81 (in Russian).
19. About General Definition of the Diagnosis Problem for Digital Circuits, (R. Ubar), Proceedings of Tallinn Technical University, No.409, 1976, Tallinn, pp.69-73 (in Russian).
20. Ein Deductives Verfahren zur Testsatzanalyse für digitale Schaltungen, (R. Ubar), Proc. of Ingenieurhochschule Dresden No.1, 1976, Dresden.
21. Über einige Probleme der Testsatzanalyse für digitale Systeme (R. Ubar), Proceedings of Technical University Dresden, No.3, 1976, Dresden.
22. Simulating System for Minicomputer Diagnostic Programs. (P. Kitsnik, R. Ubar, A.Viilup), Preprints of IFAC/IFIP 1st Int. Symp., Tallinn, August, 1976, pp.115-117.
23. Berechnung von Tests für die Fehlerdiagnose in digitalen Systemen.(R. Ubar), Proc. of 21. Int. Wiss. Koll., Technical University of Ilmenau, October, 1976, pp.33-35.
24. Analysis of Diagnostic Tests for Combinational Circuits by the Method of Fault Backtracing.(R. Ubar), Automatics and Telemechanics, No.8, 1977, Moscow, pp.168-176 (in Russian).
25. Deductive Fault Analysis in Synchronized Digital Devices without Global Feedbacks. (P.Kitsnik, R.Ubar, A.Viilup), Proc. of the All-Union Conf. on CAD of Computers, Kaunas, June, 1977, pp.178-181 (in Russian).
26. Using Alternative Graphs in Test Synthesis for Combinational Circuits. (M.Plakk and R.Ubar), Proc. of Tallinn Techn. University, No.432, 1977, Tallinn, pp.3-13 (in Russian).
27. Formulas for Deductive Analysis of Tests for Synchronized Digital Devices.(P.Kitsnik and R.Ubar), Proc. of Tallinn Technical University, No.432, 1977, Tallinn, pp.15-23 (in Russian).
28. Deductive Test Analysis Method for Logic Devices. (P.Kitsnik, R.Ubar, A.Viilup), Proc. of Technical Diagnosis Conference, Rostow-at-Don, May, 1977, pp.46-51 (in Russian).
29. Deductive Fault Analysis in Sequential Circuits. (R. Ubar), Proc. of Int. Conference on Technical Diagnostics, Praha, Czechoslovakia, 1977, pp.189-192 (in Russian).
30. Berechnung von Boole'schen Ableitungen bei der Testsatzanalyse für digitale Schaltungen. Nachrichtentechnik/Elektronik, 1977, H.1, s.21-23.
31. Multiple Fault Analysis in Logic Circuits. (R. Ubar), Proc. of the IFAC Symposium on Discrete Systems, Dresden, 1977, Band 4, pp.48-57.
32. Fault Localization in Digital Circuits with Automatic Test Equipments. (T.Lohuaru, R.Ubar, A.Viilup), Proc. of Tallinn Technical University, No.432, 1977, Tallinn, pp.37-45 (in Russian).
33. A Decomposition Method of Fault Diagnosis in Combinational Circuits. (R.Ubar), Proc. of Tallinn Technical University, No.457, 1978, Tallinn, pp.3-22 (in Russian).
34. Module Level Fault Diagnosis in Combinational Networks. (R.Ubar), Proc. of the 1st Conference on Fault-Tolerant Systems and Diagnostics, Gdansk, Poland, 1978, pp.297-314.
35. Description of Digital Devices by Alternative Graphs.(R.Ubar), Proc. of Tallinn Technical University, No.474, 1979, Tallinn, pp.11-33 (in Russian).
36. Synthesis of Test Pairs for Combinational Circuits. (M.Plakk and R.Ubar), Proceedings of Tallinn Technical University, No.474, 1979, Tallinn, pp.45-68 (in Russian).
37. Aufstellung von Testfolgen für logische Schaltungen. (M.Plakk and R.Ubar), Proc. of The 24th International Conference, Technical University of Ilmenau, October, 1979, H.2, pp.93-96.
38. Computer-Aided Module-Level Test Generation for Digital Devices on the Basis of their Alternative-Graph Model. (M.Pall and R.Ubar), Preprints of IFAC/IFIP 2nd Int. Symposium, Prague, Czechoslovakia, 1979, v.1, pp. C-XIII-1-4.
39. Alternative Graphs and Test Generation for Digital Systems. (R. Ubar), Proc. of the 2nd Conf. on Fault-Tolerant Systems and Diagnostics, Brno, Czechoslovakia, 1979, pp.177-184.
40. Fault Diagnosis in Combinational Circuits by Solving Boolean Differential Equations. (R. Ubar), Automatics and Telemechanics, No.11, 1979, Moscow, pp.170-183 (in Russian).
41. Fault Diagnosis in Sequential Circuits. (K.Grigorjeva and R.Ubar), Proc. of Tallinn Technical University, No.474, 1979, Tallinn, pp.35-44 (in Russian).
42. Diagnosis of Combinational Circuits in the Extended Class of Faults. (R. Ubar), Proc. of the Conference on CAD of Electronic Equipments, Vilnius, June, 1979, pp.177-180 (in Russian).
43. Minicomputer Software for Fault Localization Control in Digital Circuits. (T.Lohuaru, R.Ubar, A.Viilup), Preprints of IFAC/IFIP 2nd Int. Symposium, Prague, Czechoslovakia, 1979, v.1, pp. P-XIV-1-4.
44. Fault Specification in Digital Devices. (R. Ubar), Proc. of Tallinn Technical University, No.497, 1980, Tallinn, pp.3-9 (in Russian).
45. Desription of Computers by Vector Alternative Graphs for Diagnostic Microprogram Synthesis. (R. Ubar), Proc. of Tallinn Technical University, No.497, 1980, Tallinn, pp.11-20 (in Russian).
46. Test Generation for Digital Circuits by Alternative Graphs. (M.Plakk and R.Ubar), Automatics and Telemechanics, No.5, 1980, Moscow, pp.152-163 (in Russian).
47. Fault Localization in Digital Circuits in the Dialogue Mode. (R.Ubar), Proc. of Technical Diagnosis Conference, Rostow-at-Don, May, 1980, pp.76-85 (in Russian).
48. Test Simulation for Digital Devices on the Alternative-Graph-Model. (R. Ubar), Proc. of the 3rd Conf. on Fault-Tolerant Systems and Diagnostics, Katowice, Poland, 1980.
49. Beschreibung Digitaler Einrichtungen mit Alternativen Graphen für die Fehlerdiagnose.(R.Ubar), Nachrichtentechnik/Elektronik, (30) 1980, H.3, pp.96-102.
50. Computer-Aided Test Generation for Digital Circuits on the Model of Alternative Graphs. (R. Ubar). Proc. of Technical Diagnosis Conference, Rostow-at-Don, May, 1980, pp.120- 127 (in Russian).
51. Vektorielle Alternative Graphen und Fehlerdiagnose für digitale Systeme. (R. Ubar), Nachrichtentechnik/Elektronik, (31) 1981, H.1, pp.25-29.
52. Optimization of Fault Localization Procedures in Digital Systems. (T.Evartson, R.Ubar), Proc. of the All-Union Conf. on CAD of Computers, Kaunas, June,1981, pp.175-184.
53. Generation of Complete Tests for Combinational Circuits. (R.Ubar), Journal of Academy of Sciences of Estonia, Vol.31, Phys.& Math., 1982, No.4, pp.418-427 (in Russian).
54. Data Generation In Test Development for Microprocessors. (A.Toomsalu and R.Ubar), Proc. of Tallinn Technical University, No.530, 1982, Tallinn, pp.63-73 (in Russian).
55. General Approach to Multi-Valued Simulation of Digital Circuits on Alternative Graphs. (M.Pall, R.Ubar, A.Voolaine). Proc. of Tallinn Technical University, No.530, 1982, Tallinn, pp.23-38 (in Russian).
56. Optimierte Steuerung der Fehlersuche auf digitalen Leiterplatten. (E.Thoma and R.Ubar), Proc. of the 27th International Conference, Technical University of Ilmenau, October, 1982, H.3, pp.65-68.
57. General Model of Alternative Graphs for Test Generation in Digital Systems. (R. Ubar), Proc. of Tallinn Technical University, No.550, 1983, Tallinn, pp.97-109 (in Russian).
58. Test Pattern Generation for Microprocessor Systems on the Alternative Graph Model. (R. Ubar), Proc. of the 3rd Symp. of the IMEKO Techn. Committee on Technical Diagnostics. Moscow, 1983, pp.403-410.
59. Test Generation for Digital Systems on the Vector Alternative Graph Model. (R. Ubar). Proc. of the 13th Annual Int. Symp. on Fault Tolerant Computing, Milano, Italy, 1983, pp.374-377.
60. Reducing the Combinatorial Complexity in Test Generation for Digital Automata. (R. Ubar). Proc. of Tallinn Techn. University, No.550, 1982, Tallinn, pp.111-119 (in Russian).
61. Test Generation for Microprocessors. (R. Ubar). Proc. of the 6th Conf. on Fault-Tolerant Systems and Diagnostics, Brno, Czechoslovakia, 1983, pp.209-215.
62. Automated Test Synthesis for Fault Diagnosis in Digital Devices. (T.Lohuaru, M.Pall, R.Ubar). Journal of Academy of Sciences of Estonia, Vol.32, Phys.& Math., 1983, No.1, pp.84-94 (in Russian).
63. General Approach to Test Synthesis for Digital Circuits and Systems. (R. Ubar). Proc. of the 10th All-Union Workshop on Technical Diagnostics, Tallinn, Oct., 1984, pp.75-81. (in Russian).
64. Optimization of Fault Search Processes in Digital Devices. (R. Ubar). Journal of Applied Automata Theory, Humboldt University, Berlin, 1984, pp.71-106 (in Russian).
65. Fault Localization Control in Digital Circuits with Counters. (T.Evartson, R.Ubar, A.Viilup). Proc. of the 10th All-Union Workshop on Technical Diagnostics, Tallinn, Oct.,1984, pp.28-32 (in Russian).
66. About Simulation of Long Input Sequences for Digital circuits with Counter Structures. (T. Evartson and R.Ubar). Proc. of Tallinn Techn. University, No.601, 1985, Tallinn, pp.61-74 (in Russian).
67. Using Alternative Graphs for Automatization of Test Program Synthesis for Microprocessor LSI. (R. Ubar), Electronic Techniques Ser.8, 1985, Vol.5 (116), Moscow, pp.110-113.
68. Generation of Universal Tests for Digital Devices by Alternative Graphs. (R. Ubar). Proc. of Tallinn Techn. University, No.601, 1985, Tallinn, pp.51-60 (in Russian).
69. Testverfahren ftr Assembler-Programme. (T.Lorenz, G.Knospe, R.Ubar). Proceedings of The Ingenieurhochschule Wismar, No4, 1985, s.8-19 (in German).
70. General Approach to Solving Diagnosis Tasks for Digital Systems. (T.Lohuaru, R.Ubar, T.Evartson). Proc. of the 9th All-Union Symposion on Redundancy in Information Systems, Leningrad, May, 1986, pp.32-35 (in Russian).
71. Research and Development of Testing Methods for Digital Systems (R. Ubar). Thesis of Dr.Sc. Dissertation, Riga, 1986, 43 pp. (in Russian).
72. Description of Microprocessor LSI by Alternative Graphs.(R. Ubar). Proc. of Technical Diagnosis Conference, Rostow-at-Don, USSR, May, 1986, pp.24-30 (in Russian).
73. Methods of Testing Digital Systems. (R. Ubar). Proc. of Tallinn Technical University, No.626, 1986, Tallinn, pp.61-73 (in Russian).
74. Research and Development of Testing Methods for Digital Systems. (R.Ubar) DSc Dissertation. Institute of Electronics and Computer Science, Riga, 1986, 496p.
75. About Test Synthesis for Microprocessor VLSI. (T.Lohuaru and R.Ubar). Journal of Design and Diagnostics of Computers, Institute of Cybernetics, Tallinn, 1987, pp.30-42 (in Russian).
76. Test Generation for Microprocessor Control Mechanisms.(R.Ubar). Proc. of the 10th Conf. on Fault-Tolerant Systems and Diagnostics, Varna, Bulgaria, September, 1987, pp.305-311.
77. Test Generation for Microprocessors on Alternative Graphs. (R. Ubar). Proc. The 33rd Int. Conference, Technical University of Ilmenau, October, 1988, pp.11-14 (in German).
78. Description of Digital Objects with Alternative Graphs for Test Generation Purposes. (T.Lohuaru and R.Ubar). Proc. of the 11th Conf. on Fault-Tolerant Systems and Diagnostics, Suhl, May 1988, pp.157-163.
79. Test Program Compilation in Automated Test Generation for Microprocessors. (V.Alango, T.Kont, R.Ubar). Proc. of Tallinn Technical University, No.674, 1988, Tallinn, pp.78-87 (in Russian).
80. Test Generation for Data Parts in Digital Systems. (G.Elst, T.Lohuaru, B.Straube, R.Ubar). Proc. of Tallinn Technical University, No.674,1988, Tallinn, pp.65-77 (in Russian).
81. Alternative Graphs and Technical Diagnosis of Digital Devices. (R. Ubar). Electronic Techniques, Vol.8, No.5 (132),1988, Moscow, pp.33-57 (in Russian).
82. Integrated CAD of Testable Digital Systems for PCs. (V. Grigorenko, T. Lohuaru, R. Raud, R. Ubar). Proc. of. 5th International Workshop on Automation and Scientific Instrumentation (ASI'88), Varna, October 11-21, 1988, pp. 250-256 (in Russian).
83. Functional Level Test Set Generation Methods. Invited paper. (R. Ubar). Proc. of the 12th Conf. on Fault-Tolerant Systems and Diagnostics, Prague, Sept.,1989, pp.46-55.
84. Multi-Valued Simulation on the Alternative Graph Model of Digital Devices. (R.Ubar and A.Voolaine). Proc. of the 12th Conf. on Fault-Tolerant Systems and Diagnostics, Prague, Czechoslovakia, September, 1989, pp.101-104.
85. Generation of Test Experiments for Digital Devices. (A.Toomsalu, R.Ubar, V.Zaugarow). Proc. of the 9th Int. Conf., Mittweida, Germany, September, 1989, pp.46-54.
86. Automatic Test Program Generation System for Digital Systems. (V.Alango, T.Kont, R.Ubar). Proc. of the 1st Int. Conf.on CAD of Digital Systems, Leningrad, 1989, pp.23-31 (in Russian).
87. Probabilistic Testing Digital Circuits using Alternative Graphs. (R.Ubar). Proc. of Tallinn Technical University, No.696, 1989, Tallinn, pp.89-96 (in Russian).
88. Functional Specification and Testing of Digital Systems. (R.Ubar). Proc. of the 3rd Symp on Multimicroprocessor Systems Vol.1, Stralsund, Germany, October, 1989, pp.207-217.
89. Ein universeller Weg zur Automatisierung des Testentwurfs für digitale Objekte (R. Ubar, T. Lohuaru). In "Fehler in Automaten" von D. Bochmann und R. Ubar, VEB Verlag Technik Berlin, 1989. S. 16-30.
90. Test System for Fault Detection and Diagnosis in Microprocessor Control Devices. (T.Lohuaru, M.Mannisalu, P.Pukk, R.Ubar, E.Vanamolder). Proc. of Tallinn Technical University, No.708, 1990, Tallinn, pp.70-84.
91. New Test Design Techniques for Fault Detection in Digital Objects. (V.Alango, T.Kont, R.Ubar). Proc. of Tallinn Technical University, No. 708, 1990, Tallinn, pp.52-69.
92. Test Generation for Digital Systems at Functional Level. (K.Kuchcinski, Z.Peng, R.Ubar). Research Report LiTH-IDA-R-90-06, Linkoping University, Sweden, 1990, pp.21.
93. An approach to develop intelligent digital test systems. (Ubar). Periodica Polytechnica Ser. Electrical Engineering, Vol.34, No.4, pp.233-244, 1990.
94. Digital test design based on alternative graphs. (Ubar). Proc. of the 2nd European Design Automation Conference, Amsterdam, February 25-28, 1991.
95. Test generation of digital systems at functional level. (R.Ubar, K.Kuchcinski, Z.Peng). The 2nd European Test Conference, Munich, Germany, April 10-12, 1991.
96. New test design techniques for fault detection in digital devices. (Ubar). Proc. of the Int. Design Automation Conference APK'91, Kaunas, June, 1991
97. A set of tools for diagnosis of digital devices. (T.Lohuaru, R.Ubar). PC World, Information Computer Enterprise, Moscow, No1, 1991, pp.122-125 (in Russian).
98. Fault simulation in digital systems using alternative graphs. (R.Ubar). 36. Int. Wiss. Koll., TH Ilmenau, Oct. 21-24 1991. pp.737-742.
99. Test generation for ASICs. (R. Ubar). The 1st Finnish-Estonian Workshop on Digital Circuits and Algorithms, Tallinn, Estonia, March 18-20, 1991.
100.Digital test design based on alternative graphs. (R. Ubar). The 1st Finnish-Estonian Workshop on Digital Circuits and Algorithms, Tallinn, Estonia, March 18-20,1991.
101.Alternative graphs and test pattern design in digital systems. (R. Ubar). Proc. of the 6th Workshop on new directions for testing, Montreal, Canada, May 20-22, 1992.
102. Multi-Level Test Generation and Fault Diagnosis in Digital Systems. (R. Ubar). Research Report, TIM3/IMAG/INPG, France, 1992, 88 p.
103. Diagnostic Software for Systems. In "Concise Encyclopedia of Software Engineering" (R.Ubar). Pergamon Press,1992, pp.101-106.
104. Testing of systems using software. In "Concise Encyclopedia of Software Engineering" (R.Ubar). Pergamon Press,1992, pp.354-357.
105.CAD für Digitaltechnik - Eine Programmfamilie für den Entwurf von Testmustern zum Test von Digitalschaltungen (R. Ubar). IBM Hochschulkongress'92. Offene Grenzen - offene Systeme. Dresden 1992, S. IV9 1-14.
106.Algorithms of Functional Level Testability Analysis for Digital Circuits. (R.Ubar, K.Kuchcinski). Periodica Polytechnica Ser. El. Eng., Vol.36, No.3-4, pp.295-308, 1992.
107.FTGEN - A System for Functional Test Generation (R.Ubar, J.Dushina, V.Zaugarov, E.Krupnova, S.Storozhev). Proceedings of CAD-93: New Information Technologies for Science, Education and Business. Yalta May 4-13, 1993, pp.123-125 (in Russian).
108.Functional Level Testability Analysis for Digital Circuits (R.Ubar, K.Kuchcinski). Proc. of European Test Conference ETC'93, Rotterdam, April 19-22, 1993, pp.545-546.
109.Test Generation System for Microprocessors (R.Ubar,J.Dushina,V.Zaugarov, E.Krupnova, S.Storozhev). Proc. of Int. Conf. "Technical Diagnostics-93", St.-Peterburg, June 8-10, 1993, pp.87-89 (in Russian).
110.Laboratory Course for Training "Digital Design and Test" (R.Ubar,V.Tulit, A.Buldas, M.Saarepera). Proc.of IV EUROCHIP Workshop on VLSI Design Training, Toledo,
Sept.30-Oct.2, pp. 112-117, 1993.
111.TURBO TESTER. A Set of Software Tools for CAD of Test for Digital Circuits (R.Ubar, V.Tulit, A.Buldas, M.Saarepera). Proc.of IV EUROCHIP Workshop on VLSI Design Training, Toledo, Sept.30-Oct.2, pp. 396, 1993.
112. Alternative Graph Based Test Design in Digital Systems. Invited paper. (R.Ubar). Proc. of the 11. NORCHIP Seminar, Trondheim (Norway), Nov. 9-10, pp.48-62, 1993.
113. Functional Test Program Generation for Digital Systems (R.Ubar,J.Dushina, H.Krupnova, S.Storozhev, V.Zaugarov). Proc. of the 6. Workshop "Testmethoden und Zuverlässigkeit von Schaltungen und Systemen", Vaals (Niederlande), March 6-8, pp. 14-18, 1994.
114. Book review (R.Ubar). Boundary-Scan Test. By H.Bleeker, P.Van Den Eijnden and F.De Jong. Kluwer Academic, Boston (1993). 225 pp. In Engineering applications of Artificial Intelligence. Pergamon Press Ltd. 1994.
115. Test Generation for Digital Systems Based on Alternative Graphs Theory. (R.Ubar). Lecture Notes in Computer Science No 852. Dependable Computing - EDCC-1. Springer-Verlag, 1994, pp.151-164.
116. Parallel Critical Path Tracing Fault Simulation (R. Ubar). Proc. of the 39. Int. Wiss. Kolloquium. Ilmenau (Germany), Sept. 27-30, 1994. Band 1, pp. 399-404.
117.Fault Diagnosis of VLSI Devices Using Alternative Graph Representation (R.Ubar). Proc. of The 8th Symposium on Microcomputer and Microprocessor Applications. Budapest, October 12-14, 1994, Volume I, pp.34-44.
118. A PC-based CAD System for Training Digital Test (R. Ubar, A. Buldas, P. Paomets, J. Raik, V. Tulit). Proc. 5th EUROCHIP Workshop on VLSI Design Training. Dresden, October 17-19, 1994, pp.152-157.
119. Alternative Graphs as a Mathematical Tool and Knowledge Representation for Diagnosis Purposes in Digital Systems (R. Ubar). Proc. 4th Biennial Baltic Electronics Conference. Tallinn, October 9-14, 1994.
120. Constraints Analysis in Hierarchical Test Generation for Digital Systems (H. Krupnova, R. Ubar). Proc. 4th Biennial Baltic Electronics Conference. Tallinn, October 9-14, 1994.
121. Hierarchical Test Generation for Finite State Machines (M. Brik, R. Ubar). Proc. 4th Biennial Baltic Electronics Conference. Tallinn, October 9-14, 1994.
122. A CAD System for Teaching Digital Test (J. Raik, P. Paomets, E. Ivask, R. Ubar). Proc. 4th Biennial Baltic Electronics Conference. Tallinn, October 9-14, 1994.
123.Electronics Competence Centre at the Tallinn Technical University. (R.Ubar, K.Vainomaa). Proc. 4th Biennial Baltic Electronics Conference. Tallinn, October 9-14, 1994.
124. New Curricula and a Competence Centre through TEMPUS at the Technical University of Tallinn (M. Glesner, T. Hollstein, B. Courtois, P. Amblard, R. Ubar, K. Vainomaa). Proc. EC Workshop on Design Methodologies for Microelectronics, Smolenice, 1995, pp. 347-353.
125. Hierarchical Test Generation Based on Alternative Graph Model (R. Ubar). Proc. of 2nd Workshop on Hierarchical Test Generation, Duisburg, 1995.
126. Case Study in Testing Digital Systems. Invited paper (R. Ubar). Baltic Electronics, Vol. 1, No. 1, Sept. 1995, pp.24-27.
127. Fault Diagnosis in Digital Devices (R.Ubar). Proceedings of the Estonian Academy of Sciences, Engineering, 1995, No. 1/1, pp.51-67.
128. Electronics Competence Centre as a Result of European Projects at the Technical University of Tallinn (Ubar). Baltic Electronics, Vol. 1, No. 2, Dec., 1995, pp.9-11.
129. Hierarchical Test Synthesis for Digital Systems Using Alternative Graph Model. Dagstuhl-Seminar-Report 132, ISSN 0940-1121. Schloss Dagstuhl, 1995, pp.14-15.
130. Education Environment for Electronics and Microsystems (M.Ajaots, M.Min, T.Rang, R.Ubar). Proc. of the First European Workshop on Microelectronics Education. Villard de Lans, France, February 5-6, 1996, p.39.
131. Low-Cost CAD Software for Teaching Digital Test (R.Ubar, P.Paomets, J.Raik). Proc. of the First European Workshop on Microelectronics Education. Villard de Lans, France, February 5-6, 1996, p.48.
132. Test Synthesis with Alternative Graphs (R.Ubar). IEEE Design and Test of Computers. Spring, 1996, pp.48-59.
133.Teaching Test and Design for Testability with TURBO-TESTER Software (G.Jervan, A.Markus, P.Paomets, J.Raik, R.Ubar). Proc. of the 3rd Workshop on Mixed Design of Integrated Circuits and Systems, Lodz, May 1996, pp. 589-594.
134. Combining Symbolic Techniques with Topological Approach in Test Generation (R.Ubar). Proc. of the 3rd Workshop on Mixed Design of Integrated Circuits and Systems, Lodz, May 1996, pp. 377-382.
135. Multi-Level Test Generation and Fault Diagnosis for Finite State Machines (R.Ubar, M.Brik). Lecture Notes in Computer Science No 1150. Dependable Computing - EDCC-2. Springer-Verlag, 1996, pp.264-281.
136. Education Environment for Electronics and Microsystems (M.Ajaots, M.Min, T.Rang, R.Ubar). Microelectronics Education. World Scientific Publishing Co. Pte. Ltd. 1996, p.145-148.
137. Low-Cost CAD System for Teaching Digital Test (R.Ubar, P.Paomets, J.Raik). Microelectronics Education. World Scientific Publishing Co. Pte. Ltd. 1996, p.185-188.
138. Elektroonika kui Eesti innovatsioonisüsteemi infrastrukltuur (M.Min, T.Rang, R.Ubar). Eesti Teadlaste Kongress. Ettekannete kokkuvõtted. Tallinn, 1996, lk.265.
139. Fault Model and Test Synthesis for RISC Processors (R.Ubar, A.Markus, G.Jervan, J.Raik). Baltic Electronics Conference. Proceedings. Tallinn, October 7-11, 1996, pp. 229-232.
140. Test Generation for Finite State Machines (R.Ubar, M.Brik). Baltic Electronics Conference. Proceedings. Tallinn, October 7-11, 1996, pp. 233-236.
141. A Constraint-Driven Gate Level Test Generation (J.Raik, R.Ubar, G.Jervan, H.Krupnova). Baltic Electronics Conference. Proceedings. Tallinn, October 7-11, 1996, pp. 237-240.
142. Electronics Competence Centre and Research in Digital Test at Technical University of Tallinn (R.Ubar). Invited paper. IEEE 14th NORCHIP Conference, Helsinki, November 4-5, 1996, pp.134-141.
143. A New Approach to Build a Low-Level Malicious Fault List Starting from High-Level Description and Alternative Graphs (A. Benso, P.Prinetto, M.Rebaudengo, M.Sonza, R.Ubar). Proc. IEEE European Design & Test Conference, Paris, March 17-20, 1997.
144. Idead ovad pääomamme. NET 4/92 (Soome), s.20
145. Balti Ülikoolide Sõprade Selts. "Tehnikaülikool", Nr.40 (1376), 18.dets. 1992.
146. Kes on teaduste doktor? "Tehnikaülikool", Nr.2 (1378), 28. jaan. 1993.
147. Tehnikaülikool EUROCHIP'i liikmeks. "Õhtuleht", 5. märts 1993.
148. Doktoritest ja professoritest. "Tehnikaülikool", Nr.4 (1380), 17. märts 1993.
149. Assotsiatsioon EUROCHIP avas ukse Tallinna Tehnikaülikoolile. "Tehnikaülikool", Nr.4 (1380), 17. märts 1993.
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Raimund Ubar
5.03.1997