Selection Of ciphers and preliminary studies: done
assembly commands selection: done
software emulator for CPU: done
Hardware emulator in C: done
MAIN control behavioural done
ALU behavioural model: done
CONTROL behavioural model: done
IDEA block instructions optimising/pipeline building: done
MODEX operations optimising: done
IDEA and MODEX operations merging: done
ALU structural description: done
IDEA multiply structural description: done
RAM layout generation: done
Bussing selection: done
ALU layout generation: done
IDEA Block structural description: done
IDEA Functional testing: done
MODEX block Structural description: done
MODEX functional testing: done
IDEA block layout: done
MODEX layout: done
MAIN layout: done
BLOCKS assembly on silicon: done
TEST vectors generation: done
TESTS on routed silicon: done
CC silicon run stream out: done
TESTBOARD design: done
EMULATOR connecting with testboard: done
TESTS on prototype: done