We received the prototypes at the beginning of March, 1997. Since then we have developed the interface to PC using 2 XILINX FPGAs and rewrote the simulator to include the possibility to download and test the code on real device. As the result we have found these devices comply with the expectations, with 3 out of 20 prototypes not functional due to production faults. The calculated worst-case speed was 20 MHz. As experiments showed the real maximal operating speed was 25 MHz.