The verification tool (verify) operates in the manner similar to the prediagnostic tool. However, the verification tool does not perform any diagnostic analysis as the prediagnostic tool does. It just takes a set of test vectors, applies it to the specification and the implementation of a design and shows the difference in output responses.
 

prompt> verify c17	*give the name of the design without extension*
Design Verification Tool   Reading original design... OK Reading test patterns file c17.tst... OK   Reading specification file... OK   Verification process... OK Time, used by process: 0.000000 Table for error detection by test patterns Vector    Outputs
N      y2           y1   01    ERROR   ERROR   02    ERROR   ERROR   03    ERROR   ERROR	*ERROR - inconsistency between the output responses* *of the specification and the implementation* *OK - the output responses of the specification and* *the implementation are equal*

The report file c17.rep is also updated and looks as follows:

prompt> more c17.rep
Report File for the Lab Work on Design Error Diagnosis Encrypted name of the modified gate is Y{ABD7`*H{{M\LTS%Hy5)flYyj3S*

AUTOMATIC DIAGNOSIS STEP: Table of input patterns Vector            Inputs   N     x5      x4      x3      x2      x1   01     1        1        1        1        1   02     0        0        0        0        1   03     1        0        1        0        0   04     1        1        0        1        1   05     0        0        0        1        0   Suspected faulty nodes: Format: node name [suspected value]; ... x3 [0];  x4 [D];  g2>inp1 [D];  g3>inp2 [1];  x5 [0]; g4>inp1 [D];   Suspected faulty gates: Format: gate name [suspected value]; ... g2>out [D];  g4>out [1];             VERIFICATION STEP: Table of input patterns Vector            Inputs   N     x5     x4     x3     x2     x1   01     0       0       1       1       0   02     0       1       0       1       0   03     0       1       1       1       0   Table for error detection by test patterns Vector    Outputs   N      y2           y1   01    ERROR   ERROR   02    ERROR   ERROR   03    ERROR   ERROR

*the test used by the verify is saved here*     *verification data is here*

Last update: 28 July, 2004