CURRICULUM VITAE


 







Personal data:
 
Name:  Raimund-Johannes Ubar
Academic titles:   Professor, Dr.sc.techn.
Position:  Head of the Chair for Computer Engineering and Diagnostics,
 Tallinn Technical University
Address:  Ehitajate tee 5,
 Tallinn, EE0026, Estonia
 Tel.:  (372) 620 2252
 Fax:  (372) 620 2253
 E-mail: raiub@pld.ttu.ee
Private address:  Oismäe tee 45-77
 Tallinn, EE0035, Estonia
 Tel.: (372) 6 574732
Birth date:   16.12.1941
Citizenship:  Estonia

1. EDUCATIONAL INFORMATION
1986 - Doctor of Engineering Science (Dr.sc.),  Computer Engineering, Institut of Electronics and Computer Engineering in Riga, Latvia
1971 - Doctor of Philosophy (PhD), Electrical Engineering, Bauman Technical University of Moscow, Russia
1965 - Diploma of Engineer (MS), Control Engineering, Tallinn Technical University, Estonia

2. INDUSTRIAL CAREER
1965 - 1968  Engineer, Group leader at the R&D Laboratory of Electronics at the Plant  "Punane Ret" in Tallinn (Estonia)

3. ACADEMIC CAREER AT THE TALLINN TECHNICAL UNIVERSITY
1997 -  Honorary professor, Head of the Chair of Computer Engineering and Diagnostics,
1993 - 1997 Honorary professor, Head of the Electronics Competence Center
1987 - 1992 Honorary professor, Head of the Department of Computer Engineering
1978 - 1987 Associate professor
1971 - 1978  Senior lecturer
1971    Assistant

4. ACADEMIC ACTIVITIES IN OTHER COUNTRIES
Longer stays:
1998  Invited professor, Joseph Fourier University Grenoble, France (4 months)
1997  Fraunhofer Institute of Integrated Circuits, Dresden, Germany (3 months)
1996  Politechnico di Torino, Italy (2 months)
1996  Michigan State University, USA (1 month)
1995  Tempus grant, Grenoble National Polytechn. Institute, France (1,5 months)
1994  Tempus grant, Grenoble National Polytechn. Institute, France (2 months)
1993  Visiting professor, Darmstadt Technical University, Germany (1 month)
1992  Visiting professor, Grenoble National Polytechnical Inst., France (4 months),
1991  Visiting researcher, University of Linköping, Sweden (2 months),
1990  Visiting researcher, University of Linköping, Sweden (1 month)
1988  Visiting professor Technical University Dresden, Germany, (4 months)
           Barkhausen International Chair
1984  Visiting Ass. Professor, Ingenieurhochschule Wismar, Germany (3 months)
1975 - 1976  Visiting  researcher, Technical University Dresden, Germany (10 months)

Short lecture courses or seminars:
in about 25 universities and institutes  in  Germany, France, Italy, Sweden, Norway, Finland, Denmark, Hungary, Poland, USA, Russland, Lettland a.o..
1998   Joseph Fourier University Grenoble, France
1998, 1992 Technical University of Dresden, Germany
1998, 1994 Fraunhofer Assotiation in Dresden, Germany
1997   Brandenburg Technical University in Cottbus, Germany
1996   Politechnico di Torino, Italy
            University Pisa, Italy
            Michigan State University, USA (lecture course 16 hours)
            Virginia Tech, USA
1995   Technical University of Helsinki, Finland (lecture cours 16 hours)
1994, 1993 Technical University of Darmstadt, Germany (lecture course 12 hours)
1993, 1990 Royal Institute of Technology in Stockholm, Sweden
1993    Technical University Lyngby, Denmark
1991, 1990 Linköping University, Sweden (lecture course 16 hours)
1989    Technical University Riga, Latvia (32 hours)
             Technical University of Warsaw, Poland
             Royal Institute of Technology in Stockholm, Sweden
             Chalmers Technical University of Göteborg, Sweden
             Linköping University, Sweden
             Technical University of Ilmenau, Germany (14 hours)
             Ingenieurhochschule Berlin, Germany
1988    Technical University of Ilmenau, Germany (10 hours)
             Technical University of Dresden, Germany (16 hours)
             Technical University of Chemnitz, Germany (12 hours)
             University Leipzig, Germany
             Institute of Cybernetics, Dresden, Germany
1987    Technical University of Budapest, Hungary
1987, 1986 Technical University of Ilmenau, Germany (10 hours)
1986    University LITMO, St.-Peterburg, Russia
             Institut of Simulation in Power Engineering, Kiew, Ukraine
             Institut of Electronics and Computer Engineering, Riga, Latvia
1984    Ingenieurhochschule Wismar, Germany (8 hours)
             Institut für Kübernetik, Dresden, Germany
1983    Technical University of Ilmenau, Germany (12 hours)
1980, 1977 Ingenieurhochschule Dresden, Germany
1980    Technical University of Ilmenau, Germany (12 hours)
             Institut of Control Engineering, Vladivostok, Russia
1978    Institut of Control Engineering (IAT), Moscow, Russia
1977, 1976 Technical University of Ilmenau, Germany (12 hours)

5. PEDAGOGICAL WORK

Main lecture courses held:
Switching Theory, Digital Electronics, Theory and Design of Computers, Digital Test and Fault Diagnosis, Design for Testability, Fault-Tolerant Computing

Experience:
Computer Science, Applied Mathematics, Electrical Engineering, Computer Engineering, Switching Theory, Digital Test and Fault Diagnosis, Design for Testability, Fault-Tolerant Computing, Intelligent Digital Test Systems

6. RESEARCH WORK

Current research activities:
Synthesis and Analysis of Test for Digital Circuits and Systems,
Constraints Based Hierarchical Test Synthesis for Digital Systems
Fault Diagnosis in Digital Circuits and Systems,
Decision Diagrams as a Uniform Diagnostic Model for Digital Circuits and Sytems,
Development of CAD Tools for Digital Test Design
Publications:

a) Books

  1. Design of Automatic Test Equipments. (A. Seleznev, B. Dobriza, R. Ubar), Mashinostrojenie,  Moscow, USSR, 1983, 224 p. (in Russian).
  2. Fehler in Automaten. (by D. Bochmann and R. Ubar),  VEB  Verlag  Technik, Berlin, 1989,  216 p.


b) Booklets

  1. Processors in Computers (R. Ubar). Tallinn Techn. University, 1978, 103 p. (in Estonian).
  2. Diagnosis of Digital Circuits. I. (R. Ubar). Tallinn Techn. University, 1980, 114 p.  (in Russian).
  3. Diagnosis of Digital Circuits. II. (R. Ubar), Tallinn Techn. University, 1981, 112 p.  (in Russian).
  4. Operational Structures in Digital Systems. Tallinn  Technical University, (R. Ubar). 1987, 96 p. (in Estonian).
  5. Design of Digital Systems for Testability. (R. Ubar),  Tallinn  Technical University, 1988,  68 p. (in Russian).
c) Patents in FSU
  1. Equipment for Testing LSI. (T. Lohuaru and R.Ubar), A.C. No.1218390, Inf. Bull. No.10   1986.
  2. Equipment  for  Testing  Synchronized  digital   circuits.  (T.Evartson, R.Ubar, A.Viilup), A.C. No.3772884/24, Inf. Bulletin No.25, 1986.
  3. Equipment for Fault Localization in Digital Objects. (T.Evartson, H.Haak, T.Lohuaru, R.Ubar), A.C. No.3984709/24, Inf. Bulletin No.19, 1987.
  4. Equipment for testing  VLSI.  (T.Lohuaru,  M.Männisalu,  P.Pukk,  R.Ubar, E.Vanamölder). A.C. No. SU 1652976 A1, Inf. Bulletin No.20, 1991.


d) Selected papers (during the last 5 years)

1994

  1. Functional Test Program Generation for Digital Systems (R.Ubar,J.Dushina, H.Krupnova, S.Storozhev, V.Zaugarov). Proc. of the 6. Workshop "Testmethoden und Zuverlässigkeit von Schaltungen und Systemen", Vaals (Niederlande), March 6-8, pp. 14-18, 1994.
  2. Book review (R.Ubar). Boundary-Scan Test. By H.Bleeker, P.Van Den Eijnden and F.De Jong. Kluwer Academic, Boston (1993). 225 pp. In Engineering applications of Artificial Intelligence. Pergamon Press Ltd. 1994.
  3. Test Generation for Digital Systems Based on Alternative Graphs Theory. (R.Ubar). Lecture Notes in Computer Science No 852. Dependable Computing - EDCC-1.  Springer-Verlag, 1994, pp.151-164.
  4. Parallel Critical Path Tracing Fault Simulation (R. Ubar). Proc. of the 39. Int. Wiss. Kolloquium. Ilmenau (Germany), Sept. 27-30, 1994. Band 1, pp. 399-404.
  5. Fault Diagnosis of VLSI Devices Using Alternative Graph Representation (R.Ubar). Proc. of  The 8th Symposium on Microcomputer and Microprocessor Applications. Budapest, October 12-14, 1994, Volume I, pp.34-44.
  6. A PC-based CAD System for Training Digital Test (R. Ubar, A. Buldas, P. Paomets, J. Raik, V. Tulit). Proc. 5th EUROCHIP Workshop on VLSI Design Training. Dresden, October 17-19, 1994, pp.152-157.
1995
  1. New Curricula and a Competence Centre through TEMPUS at the Technical University of Tallinn (M. Glesner, T. Hollstein, B. Courtois, P. Amblard, R. Ubar, K. Vainomaa). Proc. EC Workshop on Design Methodologies for Microelectronics, Smolenice, 1995,  pp. 347-353.
  2. Hierarchical Test Generation Based on Alternative Graph Model (R. Ubar). Proc. of  2nd Workshop on Hierarchical Test Generation, Duisburg, Germany, 1995.
  3. Case Study in Testing Digital Systems. Invited paper (R. Ubar). Baltic Electronics, Vol. 1, No. 1, Sept. 1995, pp.24-27.
  4. Fault Diagnosis in Digital Devices (R.Ubar). Proceedings of the Estonian Academy of Sciences, Engineering, 1995, No. 1/1, pp.51-67.
  5. Electronics Competence Centre as a Result of European Projects at the Technical University of Tallinn (Ubar). Baltic Electronics, Vol. 1, No. 2, Dec., 1995, pp.9-11.
1996
  1. Test Synthesis with Alternative Graphs (R.Ubar). IEEE Design and Test of Computers. Spring, 1996, pp.48-59.
  2. Combining Symbolic Techniques with Topological Approach in Test Generation (R.Ubar). Proc. of the 3rd Workshop on Mixed Design of Integrated Circuits and Systems, Lodz, May 1996, pp. 377-382.
  3. Multi-Level Test Generation and Fault Diagnosis for Finite State Machines (R.Ubar, M.Brik). Lecture Notes in Computer Science No 1150. Dependable Computing - EDCC-2. Springer-Verlag, 1996, pp.264-281.
  4. Education Environment for Electronics and Microsystems (M.Ajaots, M.Min, T.Rang, R.Ubar). Microelectronics Education. World Scientific Publishing Co. Pte. Ltd. 1996, p.145-148.
  5. Low-Cost CAD System for Teaching Digital Test (R.Ubar, P.Paomets, J.Raik). Microelectronics Education. World Scientific Publishing Co. Pte. Ltd. 1996, p.185-188.
  6. Electronics Competence Centre and Research in Digital Test at Technical University of Tallinn (R.Ubar). Invited paper. IEEE 14th NORCHIP Conference, Helsinki, November 4-5, 1996, pp.134-141.
1997
  1. A New Approach to Build a Low-Level Malicious Fault List Starting from High-Level Description and Alternative Graphs (A. Benso, P.Prinetto, M.Rebaudengo, M.Sonza,  R.Ubar). Proc. IEEE European Design & Test Conference, Paris, March 17-20, 1997.
  2. Multi-Valued Simulation with Binary Decision Diagrams (R.Ubar, J.Raik). Proc.IEEE European Test Workshop, Cagliari (Italy), May 28-30, 1997, pp.28-29.
  3. Boolean Derivatives and Multi-Valued Simulation on Binary Decision Diagrams (R.Ubar). 4th International Workshop on Mixed Design of Integrated Circuits and Systems. Poznan, June 12-14, 1997, pp.115-120.
  4. Representing Transparency Conditions in Test Generation for VLSI by Decision Diagrams (R.Ubar). 1st Electronic Circuits and Systems Conference. Bratislava, September 4-5, 1997, pp.213-216.
  5. Multi-Valued Simulation of Digital Circuits (R.Ubar). Proc. of the IEEE 21st Int.  Conference on Microelectronics. Nis, Yugoslavia, September 14-17, 1997, pp. 721-724.
  6. Behavioral Level Modeling of Digital Systems for Testing Purposes (R.Ubar). 42nd International Conference. Part 1. Ilmenau (Germany), September 22-25, 1997, pp. 510-515.
  7. A Set of Tools for Estimating Quality of Built-In Self-Test in Digital Circuits (G.Jervan,  A.Markus, P.Paomets, J.Raik, R.Ubar). Proc. of the International Symposium on Signals, Circuits and Systems. Iasi, (Romania), October 2-3, 1997, pp.362-365.
  8. Exploiting High-Level Descriptions for Circuits Fault Tolerance Assessments  (A.Benso, P.Prinetto, M.Rebaudengo, M.Sonza Reorda, J.Raik, R.Ubar). 1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. Paris, October 20-22, 1997, pp. 212-216.
  9. Assembling Low-Level Tests to High-Level  Symbolic Test Frames (G. Jervan, A.Markus, J. Raik, R. Ubar). IEEE 15th NORCHIP Conference, Tallinn, November 10-11, 1997, pp. 275-280.
  10. Mixed-Level Test Generator for Digital Systems (M.Brik, G.Jervan, A.Markus, P.Paomets, J.Raik, R.Ubar). Proceedings of the Estonian Acad. of Sci. Engng, 1997, Vol. 3 , No 4, pp. 269-280.
1998
  1. Combining Functional and Structural Approaches in Test Generation for Digital Systems  (R.Ubar). Journal of Microelectronics and Reliability, Elsevier Science Ltd. No.1, pp.1-13, 1998.
  2. Multi-Valued Simulation of Digital Circuits with Structurally Synthesized Binary Decision Diagrams (R.Ubar). Gordon and Breach Publishers, Multiple Valued Logic, Vol.  pp. 1-17, 1998.
  3. Dynamic Analysis of Digital Circuits with 5-valued Simulation (R. Ubar). In "Mixed Design of Integrated Circuits and Systems". Kluwer Academic Publishers, pp.187-192, 1998.
  4. Hierarchical Test Generation for Digital Systems (M.Brik, G.Jervan, A.Markus, J.Raik, R.Ubar). In "Mixed Design of Integrated Circuits and Systems". Kluwer Academic Publishers, pp.131-136, 1998.
  5. Turbo Tester: A CAD System for Teaching Digital Test (G.Jervan, A.Markus, P.Paomets, J.Raik, P.Paomets). In "Microelectronics Education". Kluwer Academic Publishers, pp.287-290, 1998.
  6. Feasibility of Structurally Synthesized BDD Models for Test Generation (J.Raik, R.Ubar). Proc. of the IEEE European Test Workshop, Barcelona (Spain), May 27-29, 1998, pp.145-146.
  7. Hierarchical Test Generation with Multi-Level Decision Diagram Models (G.Jervan, A.Markus, J.Raik, R.Ubar). Proc. of the 7th IEEE North Atlantic Test Workshop,  West Greenwich RI, USA, May 28-29, 1998, pp.26-33.
  8. Mixed Bottom-Up/Top-Down Hierarchical Test Generation for Digital Systems (R.Ubar). Proc. of the 9th European Workshop on Dependable Computing, Gdansk (Poland), May 14-16, 1998, pp.37-40.
  9. Synthesis of Decision Diagrams from Clock-Driven Multi-Process VHDL Descriptions for Test Generation (R.Leveugle, R.Ubar). Proc. of the 5th International Conference on Mixed Design of Integrated Circuits and Systems. Lodz (Poland), June 18-20, 1998, pp. 353-358. The Best Paper Award.
  10.  Hierarchical Test Generation for Digital Systems Based on Combining Bottom-Up and Top-Down Approaches (J.Raik, R.Ubar). World Multiconference on Systemics, Cybernetics and Informatics. Orlando, Florida, July 12-16, 1998, Vol.1, pp. 374-381.
  11. Dynamic Analysis of Digital Circuits with Multi-Valued Simulation (R. Ubar). Microelectronics Journal, Elsevier Science Ltd., Vol. 29, No. 11, Nov. 1998, pp.821-826.
  12. Localization of Single-Gate Design Errors in Combinational Circuits by Diagnostic Information about Stuck-at Faults (R.Ubar, D.Borrione). Proc. of the 2nd International Workshop on Design and Diagnostics of Electronic Circuits and Systems. Szczyrk, Poland, Sept. 2-4, 1998, pp.73-79.
  13. Generation of Tests for the Localization of Single-Gate Design Errors in Combinational Circuits Using the Stuck-at Fault Model (R.Ubar, D.Borrione). Proc. of the 11th IEEE Brasilian Symposium on Integrated Circuit Design. Rio de Janeiro, Brazil, Sept. 30 – Oct. 3, 1998, pp.51-54
  14. Comparison of Genetic and Random Techniques for Test Pattern Generation (E.Ivask, J.Raik, R.Ubar). Proc. of the 6th Baltic Electronics Conference, Oct. 7-9, 1998, Tallinn, pp. 163-166.
  15. Calculation of Testability Measures on Structurally Synthesized Binary Decision Diagrams (R.Ubar, J.Heinlaid, J.Raik, L.Raun). Proc. of the 6th Baltic Electronics Conference, Oct. 7-9, 1998, Tallinn, pp. 179-182.
  16. Compaction of Decision Diagrams for Describing Multi-Process VHDL Descriptions (R.Leveugle, G.Saucier, R.Ubar). Proc. of the 6th Baltic Electronics Conference, Oct. 7-9, 1998, Tallinn, pp. 195-198.
  17. Teaching Dependability Issues in System Engineering at the Technical University of Tallinn (R.Ubar). Global J. of Engineering Education, Vol.2, No 2, 1998 UICEE, Printed in Australia, pp. 215-218.
The total number of scientific papers during 1994-1998 is 67. The total number of papers on educational and scientific-political topics during the mentioned period is 60.

Projects during 1994-1998

Joint European projects:

  1. INCO-COPERNICUS JEP 9601/70 “Promotion of System Design Training and Information Centers in CCE/NIS” (1996-1998)
  2. COPERNICUS JEP 9624 "Functional Test Generation  and  Diagnosis" (FUTEG) (1994-1997)
  3. PECO JEP 7668 "East European Microelectronics Cooperation Network of Support and Competence Centres (EEMCN)" (1993-1996)
  4. ESPRIT III BRA-6575 “Advanced test generation and testable design methodology for sequential circuits (ATSEC)” (1994-1996)
  5. ESPRIT Action EUROPRACTICE (1993-1995)
  6. ESPRIT Action EUROPRACTICE (1995-)
  7. TEMPUS JEP 4772 "Digital System Design Based on PLD-Technology" (1992-95)


Bilateral international projects:

  1. EST-008-96 “Automated Test Generation for FPGA based Designs” (1996-1999). Partner: Fraunhofer Gesellschaft, Institute of Integrated Circuits, Dresden (Saksamaa).
  2. “Generic VHDL Descriptions for Synthesizing Embedded Test Processors” (1996). Partner: Jonköping University (Rootsi).
  3.  “Digital Encryption Standard Macroblock” (1996). Partner: Fincitec OY Finland (Soome)


Estonian Science Foundation:

  1. Hierarchical Methods of Test Synthesis for Digital Systems. Grant G-1850, 1996-1999.
  2. Environment and Tools for Digital Design. Grant G-2104, 1996-1998.
  3. Methods and Tools for Digital Test. Grant G-1433, 1993-1995.
  4. Infrastructure for Electronics Competence Centre. Grant G-1434, 1993.


Projects for Estonian Industry:

  1. Contract No. 6412 “Design of a Cryptographical Processor” (1994-96). Partner: Institute for Cybernetics.
  2. Contract “Testing of the prototype of the Cryptographical Processor”   (1996-1997). Partner: Institute for Cybernetics.
International cooperation in research (during 1994-1998)

Partners in European joint projects:

  1. Institute National Polytechnique de Grenoble (France) - COPERNICUS 9624, PECO 7668
  2. Technical University Darmstadt (Germany), TEMPUS 4772
  3. Rutherford Appleton Laboratory (UK), INCO-COPERNICUS 9601/70
  4. Fraunhofer Gesellschaft Institute of ICs (Dresden, Germany) - COPERNICUS 9624,  PECO 7668
  5. Microelectronics IME Ltd. (Sofia, Bulgaria) - PECO 7668
  6. Slovak Technical University (Bratislava, Slovak Republic) - COPERNICUS 9624,  PECO 7668, INCO-COPERNICUS 9601/70
  7. Institute of Computer Sciences (Bratislava, Slovak Republic) - PECO 7668
  8. Czech Technical University (Praha, Czech Republic) - PECO 7668
  9. Technical University of Budapest (Budapest, Hungary) - COPERNICUS 9624, PECO 7668
  10. Institute of Electron Technology (Varssavi, Poland) - PECO 7668
  11. Warsaw Univ. of Technology (Varssavi, Poland) - PECO 7668, INCO-COPERN  9601/70
  12. Institute of Electronics (Riga. Latvia) - PECO 7668
  13. Technical University of Kaunas (Lithuania) - COPERNICUS 9624, PECO 7668
  14. GMD (St. Augustin, Germany) - ESPRIT 6575, INCO-COPERNICUS 9601/70
  15. Technische Universität Duisburg (Germany) - ESPRIT 6575
  16. Politechnico di Torino (Italy) - ESPRIT 6575
  17. University of Montpellier (France) - ESPRIT 6575
  18. University of Twente (Holland) - ESPRIT 6575
  19. Institute of Operating Systems (Moscow, Russia) - INCO-COPERNICUS 9601/70
  20. Vladimir State Technical University (Russia) - INCO-COPERNICUS 9601/70
  21. Technical University Lodz (Poola) - INCO-COPERNICUS 9601/70
  22. Technical University Sofia (Bulgaria) - INCO-COPERNICUS 9601/70
7. ORGANISATIONAL ACTIVITIES

a) Editorial work
1997 -  Journal of Analog Integrated Circuits and Signal Processing (Guest Editor) Journal of Baltic Electronics (Member of the Editorial Board)
1997 -  15. IEEE NORCHIP (Proceedings of the conference)
1996 -  5. Biennial Baltic Electronics Conference (Proceedings of the conference)
1994 -  4. Biennial Baltic Electronics Conference (Proceedings of the conference)
1991 -  “Digital Design” Joint Estonian-Finnish Workshop (Proceedings)
1989 -  Monography  “Fehler in Automaten” VEB Verlag Technik, 216 S, Berlin.  (Editing with D.Bochmann)
1984 -  10th All-Union Conference on Test and Diagnostics (Proceedings of the conference)
1980 – 1990 Proceedings of the Tallinn Technical University

b) Section chairing at international conferences
1998   IEEE European Test Workshop, Barcelona (Spain)
9th European Workshop on Dependable Computing, Gdansk (Poland),
90th Anniversary Jubilee Symposium on Engineering Education. Wismar (Germany)
5th Electronic Devices and Systems Conference, Brno (Czeck Republic)
5th Int. Conference on Mixed Design of Integrated Circuits and Systems. Lodz (Poland)
2nd Int.  Workshop on Design and Diagnostics of Electronic Circuits, Szczyrk  (Poland)
6th Baltic Electronics Conference, Tallinn (Estonia)
1997 European Test & Design Conference, Paris (France)
IEEE Int. Symposium on Defect and Fault Tolerance in VLSI Systems, Paris (France)
4th Int. Workshop on Mixed Design of ICs and Systems, Poznan (Poland)
1st Electronic Circuits and Systems Conference, Bratislava (Slovak Republic)
IEEE 21st Int.  Conference on Microelectronics, Nis (Yugoslavia)
IEEE 15th NORCHIP Conference, Tallinn (Estonia)
1996  1st European Test Workshop, Montpellier (France)
5th Baltic Electronics Conference, Tallinn
2nd European Conference on Dependable Computing - EDCC-2, Taormina (Italy)
European Test & Design Conference, Paris (France)
1995   Mixed Design of Integrated Circuits and Systems, Lodz (Poland)
European Test & Design Conference, Paris (France)
EC EEMCN Workshop, Bratislava (Slovak Republik)
1994  4th Baltic Electronics Conference, Tallinn
39th International Conference, TU Ilmenau (Germany)
5th EUROCHIP Workshop on VLSI Design Training, Dresden (Germany)

c) Participating in Conference Program Committees
1998 3th European Test Workshop, Barcelona (Spain)
16th IEEE NORCHIP Conference, Tallinn (PC Chairman)
9th European Workshop on Dependable Computing, Gdansk (Poland),
90th Anniversary Jubilee Symposium on Engineering Education. Wismar (Germany)
5th Electronic Devices and Systems Conference, Brno (Czeck Republic)
5th Int. Conference on Mixed Design of Integrated Circuits and Systems. Lodz (Poland)
2nd Int.  Workshop on Design and Diagnostics of Electronic Circuits, Szczyrk  (Poland)
6th Baltic Electronics Conference, Tallinn (Estonia)
1997  European Test & Design Conference, Paris (France)
15th IEEE NORCHIP Conference, Tallinn (PC Chairman)
2nd European Test Workshop, Cagliari (Italy)
Mixed Design of Integrated Circuits and Systems MIXDES’97, Poznan (Poland)
Int. Conference on Electronics Circuits and Systems, Bratislava (Slovak Rep.)
Int. Conference on Design and Diagnostics of Electr. Circuits, Prague (Czech Rep.)
Int. Conference on Computers and Electronics, Dubrovnik (Croatia)
1996 - 5th Baltic Electronics Conference, Tallinn (Estonia)
1st European Test Workshop, Montpellier (France)
2nd European Conference on Dependable Computing - EDCC-2, Taormina (Italy)
European Test & Design Conference, Paris (France)
Mixed Design of Integrated Circuits and Systems MIXDES’96, Lodz (Poland)
International CAD Conference, Gelengick (Russia)
World Conference of Estonian Scientists, Tallinn
1995  European Test & Design Conference, Paris (France)
International Conference on CAD, Jalta (Ukraine)
EU Workshop on Design Methodol. for Microelectronics, Smolenice (Slovak Rep.)
1994  4th Baltic Electronics Conference, Tallinn
International Conference on CAD, Jalta (Ukraine)
1st European Conference on Dependable Computing - EDCC-1, Berlin (Germany)
5th EUROCHIP Workshop on VLSI Design Training, Dresden (Germany)

d) Memberships in Estonia:

  1. Estonian Academy of Sciences, member (1993 -)
  2. Academic Council at the President of Estonia, member (1994 -1997)
  3. Estonian Science Council, member (1995 -)
  4. Estonian Science Foundation, chairman (1993-1997)
  5. ESF Department for Technical Sciences, chairman (1993-1997)
  6. Estonian Science Union, member of the Board (1991 -)
  7. Estonian Society of Control Engineering, member (1991 -)
  8. Estonian Society of Electronics, member (1992 -)
  9. Comission for Delivering  Estonian Science Awords, member (1994-1996)
  10. Estonian Society for Information Technology, ekspert (1993 -)
  11. Estonian-German Comission for Cooperation at the Estonian Higher Education Ministery (1994 -)


e) International memberships:

  1. International Academy of Sciences and Arts, USA (1996 -)
  2. European Test Technology Technical Committee (ETTTC), member (1995 -)
  3. EEE Education Society (USA), member (1995 -)
  4. IEEE Computer Society (USA), member (1995 -)
  5. IEEE Technical Council on Software Engineering European regional group (1995 -)
  6. Gesellschaft der Informatic (Society of Inform. Technol. in Germany), member (1995 -)
  7. Association for Computing Machinery, member (1997 -)
  8. EU assotiation EUROPRACTICE, member (1995 -)
  9. EU assotiation EUROCHIP, member (1993-1995)
  10. Steering Committee of the European Dependable Computing Conference (1994 -)
  11. Council of the All-Union Association of Technical Diagnostics of the FSU, member  (1991-1993)
  12. Baltic Academy of Technological Sciences, foundation member (1992 -)
8. HONOURS

1996 – EU TEMPUS grant (for 2,5 months at the Politechnico di Torino, Italy)
1993 – Grant from CNRS (for 4 month at the TIMA in Grenoble, France)
1992 – Grant from Swedish Institute (for 2 months at the Linköping University, Sweden)
1988 – Barkhausen chair (4 months at the Technische Hochschule Dresden, Germany)
1986 – 2 Silver Medals at the All-Union Exhibition of Research Results in the FSU
 

Prof. Raimund Ubar
Tallinn, 13.11.1998