Mentor Graphics EN2004
Product
|
Platform / OS Compliance |
|||
Solaris
|
Windows |
Linux |
Linux |
|
Integrated Systems Design
2004SPac1 (Collection
of tools for FPGA/PCB) Overview (PDF) |
2.8 / 2.9 |
2000 / XP |
3.0 |
- |
- Expedition Series WG2004SP1 |
- |
2000 / XP |
3.0 |
- |
- ICX/TAU 2004 SPac1 (V3.4) |
2.8 / 2.9 |
2000 / XP |
- |
- |
|
|
|
|
|
FPGA Advantage V6.3 (FPGA design
platform) |
2.8 |
NT / 2000 / XP |
7.3 |
- |
- HDL Designer V2004.1 (Design creation) |
2.7/2.8/2.9 |
NT / 2000 / XP |
7.2 / 7.3 |
- |
- ModelSim SE V5.8c (Digital Simulation) |
2.6/2.7/2.8/2.9 |
98/ME |
6.0/6.1/6.2 |
- |
- Leonardo Spectrum V2004a (Digital Synthesis) |
2.6 / 2.8 |
NT / 2000 / XP |
- |
- |
- Precision Synthesis V2003c (Synthesis) |
2.8 |
NT / 2000 / XP |
7.3 |
- |
ModelSim SE
V6.0a (Simulation) Complete
tutorial (14 lessons): pitsa:/cad/m_04/msim/docs/pdf/se_tutor.pdf |
2.6/2.7/2.8/2.9 |
98/ME |
7.2/7.3/8.0/8.2/9.0 |
3.0 |
I/O Designer V2004a |
2.8 |
2000 / XP |
3.0 |
- |
Design For Test V8.2004_5
One old tutorial (PDF) Short overview (PDF) |
2.8 / 2.9 |
- |
7.2/2.1/3.0 |
3.0 |
Board Process Library 2004 A family of libraries with data views supporting a Mentor
Graphics Board Design Process. The base CAD-only-library contains both digital
and analog part views to support schematic capture and board layout. |
2.8 / 2.9 |
- |
3.0 |
- |
Logical Cable VEN2002.6 A wiring connectivity editor for wire harness and cabling
design. |
2.6/2.7/2.8/2.9 |
NT / 2000 / XP |
- |
- |
SystemVision V2004.4/3.2 SystemVision is Mentor's solution for math-based
computer-aided prototyping, which enables Control Systems exploration |
- |
NT / 2000 / XP |
- |
- |
|
|
|
|
|
IC Flow V2004.2s Custom IC Design AutoCells
| Design Architect-IC | EldoNet | HotPlot | IC Station | ICnet | Schematic
Generator IC |
2.7/2.8/2.9 |
- |
7.2/7.3/8.0 |
- |
AMS V2004.2a Analog/Mixed Signal ADMS RF | ADVance Design ToolBox | ADVance MS | ADVance
CommLib | Artist Link | Eldo | Eldo Mach | Eldo RF | EZwave | Mach TA |
Verilog-AMS | Xelga |
2.7/2.8/2.9 |
- |
7.2 / 3.0 |
- |
Calibre V2004.3_9
|
2.7/2.8/2.9 |
- |
7.2/8.0/2.1/3.0 |
3.0 |
Platform Express V2004.4/2.1h XML-based rapid system-on-chip (SoC) design creation tool,
supports the SPIRIT 1.0 specification for intellectual property (IP) design
re-use |
2.8 |
- |
7.2 |
- |
Formal Pro V2004.4 Formal
Verification and Debugging RTL-to-RTL, RTL-to-Gate,
and Gate-to-Gate. |
2.7 / 2.8 |
- |
8.0/9.0/3.0 |
- |
TeraPlace V2.2.8 Placement,
including Placement, Virtual Routing, Timing Analysis, Extraction and
Optimization |
2.5/2.51/2.6 |
- |
- |
- |
Seamless CVE V5.3_2.1 Co-Verification and Co-Simulation |
2.7 |
- |
7.2 |
- |
SST Velocity V3.4_1.2 The SST Velocity application is an easy to use, high
speed, gate level static timing analysis and verification tool designed for full-chip
verification of ASIC devices. The application supports standard netlist formats,
multiple asynchronous clock domains, complex clocking schemes such as gated and
derived clocks, transparent latches, and multi-cycle paths. |
2.8 |
- |
9.0 |
- |
MachTA V3.3_0.7 Fast digital SPICE simulator |
2.8 / 2.9 |
- |
7.2 / 8.0 |
- |
Mentor Graphics original documentation (PDF files
bookcase): mgcdocs
PDF files are located at: pitsa:/cad/m_04/mgc_tree/shared/
ModelSim documentation is located at:
pitsa:/cad/m_04/msim/docs/
Very
strong support library via MG SupportNet: www.mentor.com/supportnet/ (Please turn to Gert for a password)
Further information: Gert Jervan <gerje@pld.ttu.ee>
Technical
questions (installation, licences, maintenance): Marek Mandre <marek@pld.ttu.ee>