Fault Simulator for Sequential Circuits.
input: | SSBDD model file (.agm), Test pattern file (.tst) | |
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output: | Test pattern file (.tst) | |
syntax: | seqsimul [options] <design> | |
arguments: | design | Name of the design file without .agm extension |
options: | -faultfree | Perform faultfree simulation |
-extension <extension> | File extension of input patterns file. The default is "tst" |
No Error Conditions defined
0 | Success |
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1 | Error |
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